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Hello @jonathanpallant I wanted to take this issue up. But I've a few questions would you help?
The arm_gic currently won't support GICv1, zynx-7000 uses this.
The timers that current code base supports are virtual, physical on EL*, A9 have a different mechanism for this. Do you recommend on extending the Timer framework to support Physical, Private and Watchdog?
So we'll need a GICv1 driver (@robamu what do you use?)
Can the Cortex-A9 timers meet the trait I added? If so I guess we can move it into a timer module and have cfg-gated modules for the implementations on different architectures.
Yes, for (2) Adding/Extending the generic_timer module from the trait would suffice. And the invocation could be cfg-gated. I'll wait for (1). From @robamu . Thank you.
I was planning a new HAL release.. but another option would also be to copy and paste relevant stuff and API, or combine the approached and only use the PAC, write a very basic HAL driver for the example.
I try and keep the examples as light-weight as possible - they are supposed to be educational rather than production-ready. So I would include the bare minimum required to show that both processor cores are running and can ping each other. This probably requires a GIC driver, but a WFE/SEV ping pong would also work.
See #205 where I brought SMP support into the library, hopefully making SMP examples much easier to write. Now you just need a secondary core park function of some kind.
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sriramster commentedon Jul 1, 2026
Hello @jonathanpallant I wanted to take this issue up. But I've a few questions would you help?
Thank you.
jonathanpallant commentedon Jul 2, 2026
sriramster commentedon Jul 2, 2026
Yes, for (2) Adding/Extending the generic_timer module from the trait would suffice. And the invocation could be cfg-gated. I'll wait for (1). From @robamu . Thank you.
robamu commentedon Jul 2, 2026
I have a low level PAC API which is part of the zynq7000 crate and a more high level driver in zynq7000-hal. Those might help.
GIC PAC: https://github.com/us-irs/zynq7000-rs/blob/main/firmware%2Fzynq7000%2Fsrc%2Fgic.rs
GIC HAL: https://github.com/us-irs/zynq7000-rs/blob/main/firmware%2Fzynq7000-hal%2Fsrc%2Fgic.rs
robamu commentedon Jul 3, 2026
I was planning a new HAL release.. but another option would also be to copy and paste relevant stuff and API, or combine the approached and only use the PAC, write a very basic HAL driver for the example.
sriramster commentedon Jul 3, 2026
@robamu Do you recommend having just the driver code within the examples? (In this case for the specific example)
thejpster commentedon Jul 12, 2026
I try and keep the examples as light-weight as possible - they are supposed to be educational rather than production-ready. So I would include the bare minimum required to show that both processor cores are running and can ping each other. This probably requires a GIC driver, but a WFE/SEV ping pong would also work.
thejpster commentedon Jul 12, 2026
See #205 where I brought SMP support into the library, hopefully making SMP examples much easier to write. Now you just need a secondary core park function of some kind.
sriramster commentedon Jul 26, 2026
@thejpster I think this can be closed now?
thejpster commentedon Jul 26, 2026
@jonathanpallant close this when you get to a PC