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5 changes: 2 additions & 3 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -38,9 +38,8 @@ selects the CPU architecture, and it is passed to `cargo-verus` as `--target`:
cargo dv verify --package ostd --target x86_64-unknown-none
```

The default is `x86_64-unknown-none`. `riscv64imac-unknown-none-elf` is also a
validated target; `loongarch64-unknown-none-softfloat` is experimental: `ostd`
does not yet build for it, so the command is expected to fail.
The default is `x86_64-unknown-none`. `riscv64imac-unknown-none-elf` and
`loongarch64-unknown-none-softfloat` are also validated targets.

### Verification modes

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7 changes: 5 additions & 2 deletions src/verus.rs
Original file line number Diff line number Diff line change
Expand Up @@ -39,8 +39,11 @@ pub const SUPPORTED_RUST_TARGETS: &[&str] = &[
];

/// Rust target triples known to build and verify end to end.
pub const VALIDATED_RUST_TARGETS: &[&str] =
&["x86_64-unknown-none", "riscv64imac-unknown-none-elf"];
pub const VALIDATED_RUST_TARGETS: &[&str] = &[
"x86_64-unknown-none",
"riscv64imac-unknown-none-elf",
"loongarch64-unknown-none-softfloat",
];

pub fn parse_rust_target(triple: &str) -> Result<String, String> {
if !SUPPORTED_RUST_TARGETS.contains(&triple) {
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