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[sysvabi64] Correct FMV CPU feature bit positions - #432
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The CPU feature table lists FEAT_FLAGM2 at both bits 2 and 3. The duplicate shifts every subsequent documented feature by one bit, from FEAT_FP16FML through FEAT_MOPS. Remove the duplicate at bit 3 and decrement the subsequent bit positions, preserving the existing gaps. Record the correction in the change history.
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I hope I documented the change correctly in the changelog. I am not sure what release to add it as ? |
smithp35
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Thanks for the update. Text changes LGTM.
Can you update the change-log as suggested, and can you mention in the description that this brings the spec in line with the implementations in GCC and Clang?
After that I can approve.
| | | | - Document Function Multi-Versioning. | | ||
| | | | - Added chapter on Thread Local Storage (TLS) | | ||
| +------------+------------------------------+-------------------------------------------------------+ | ||
| | Unreleased | | - In `Function Multi-Versioning`_, remove the | |
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I suggest 2026Q3 with today's date. It is likely that the editor will sanitize the change-log dates prior to release, but getting as close as we can will help that process.
smithp35
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Thanks for the update. LGTM as this makes the doc match the implementations.
Will be good to give other reviewers a chance to comment, but if there's no further traffic I suggest we merge this tomorrow (6th October)
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The CPU feature table lists FEAT_FLAGM2 at both bits 2 and 3. The duplicate shifts every subsequent documented feature by one bit, from FEAT_FP16FML through FEAT_MOPS.
Remove the duplicate at bit 3 and decrement the subsequent bit positions, preserving the existing gaps. Record the correction in the change history.